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Computer Science Program Presents

Tuesday, March 15, 2016
Fast IP Address Lookups Using Helix: 

Parallel Prefix Matching and Short Binary Trees
RKC 115
12:00 pm
Roberto Rojas-Cessa
New Jersey Institute of Technology
In this presentation, we discuss the problem of Internet Protocol (IP) address lookup and the challenges it has dragged for long time.  We focus on schemes based on binary trees, which are known to be lagging in lookup speed as compared to content-addressable memory solutions. We present a recently designed IP lookup scheme, called Helix, that performs parallel prefix matching at the different prefix lengths and uses the helicoidal properties of binary trees to reduce their height. Helix minimizes the amount of memory used to store long and numerous prefixes and achieves IP lookup and route updates in a single memory access. We show the evaluations of the performance of Helix with several IPv4 and IPv6 forwarding tables.
Roberto Rojas-Cessa received the Ph.D. degree in Electrical Engineering from Polytechnic University (now the New York University Tandon School of Engineering, Polytechnic Institute), Brooklyn, NY. Currently, he is an Associate Professor in the Department of Electrical and Computer Engineering, New Jersey Institute of Technology. He has been involved in design of systems for high-speed computer communications, and in the development of high-performance and scalable packet switches and reliable switches. His research interests include data center networks, high-speed switching and routing, fault tolerance, quality-of-service networks, network measurements, and distributed systems. He is the recipient of the Excellence in Teaching  Award 2013 from the Newark College of Engineering. He is a recipient of New Jersey Inventors  Hall of Fame - Innovators Award in 2013. He is a Senior Member of IEEE.

For more information, call 845-752-2307, or e-mail

Time: 12:00 pm

Location: RKC 115